Parallel-Segmented CMOS Step-Up Autotransformer and Modeling

نویسندگان
چکیده

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Cyclic Segmented Parallel Prefix

The cyclic segmented parallel prefix (CSPP) circuit is a varation on parallel prefix. Whereas ordinary parallel prefix computes prefix sums of a vector from the beginning, CSPP allows the starting point to move arbitrarily, with the data “wrapping around.” The wraparound is widely useful. We have used CSPP to redesign many components of a superscalar processor to run in time logarithmic in the ...

متن کامل

Design of a PTC-Inspired Segmented ADC for High-Speed Column-Parallel CMOS Image Sensor

This paper presents a successive approximation ADC (SAR) architecture that takes advantage of the signal-dependent photon shot-noise characteristic of an image sensor. The multi-segmented successive approximation ADC (MS-SAR) applies the sub-ranging technique, where each segment’s conversion step size is scaled according to the photon transfer curve (PTC) of a given pixel. The MS-SAR selects th...

متن کامل

Design and analysis of power-CMOS-gate-based switched-capacitor DC-DC converter with step-down and step-up modes

A unified multi-stage power-CMOS-transmission-gate-based quasi-switched-capacitor (QSC) DC-DC converter is proposed to integrate both step-down and step-up modes all in one circuit configuration for low-power applications. In this paper, by using power CMOS transmission gate as a bi-directional switch, the various topologies for step-down and step-up modes can be integrated in the same circuit ...

متن کامل

High Efficiency 3-Phase Cmos Rectifier with Step Up and Regulated

This paper presents several design issues related to the monolithic integration of a 3-phase AC to DC low voltage, low power rectifier for 3-phase micro source electrical conditioning. Reduced input voltage operation (down to 1V), high efficiency, and output voltage regulations are implemented, based on commercially available CMOS technology. Global design and system issues are detailed. The ma...

متن کامل

10-bit segmented current steering DAC in 90nm CMOS technology

This special project presents a 10-Bit 1Gs/s 1.2V/3.3V Digital-to-Analog Converter using1 Poly 9 Metal SAED 90-nm CMOS Technology intended for mixed-signal and power IC applications. To achieve maximum performance with minimum area, the DAC has been implemented in 6+4 Segmentation. The simulation results show a static performance of ±0.56 LSB INL and ±0.79 LSB DNL with a total layout chip area ...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

ژورنال

عنوان ژورنال: The Journal of Korean Institute of Electromagnetic Engineering and Science

سال: 2020

ISSN: 1226-3133,2288-226X

DOI: 10.5515/kjkiees.2020.31.11.905